esd protection methodologies

ESD Protection Methodologies
Author: Marise Bafleur
Publisher: Elsevier
Release Date: 2017-07-26
Pages: 284
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Failures caused by electrostatic discharges (ESD) constitute a major problem concerning the reliability and robustness of integrated circuits and electronic systems. This book summarizes the many diverse methodologies aimed at ESD protection and shows, through a number of concrete studies, that the best approach in terms of robustness and cost-effectiveness consists of implementing a global strategy of ESD protection. ESD Protection Methodologies begins by exploring the various normalized test techniques that are used to qualify ESD robustness as well as characterization and defect localization methods aimed at implementing corrective measures. Due to the increasing complexity of integrated circuits, it is important to be able to provide a simulation in which the implemented ESD protection strategy provides the desired protection, while not harming the performance levels of the circuit. Therefore, the main features and difficulties related to the different types of simulation, finite element, SPICE-type and behavioral, are then studied. To conclude, several case studies are presented which provide real-life examples of the approaches explained in the previous chapters and validate a number of the strategies from component to system level. Provides a global ESD protection approach from component to system, including both the proposal of investigation techniques and predictive simulation methodologies Addresses circuit and system designers as well as failure analysis engineers Provides the description of specifically developed investigation techniques and the application of the proposed methodologies to real case studies

Simulation Methods For ESD Protection Development
Author: Harald Gossner
Publisher: Elsevier
Release Date: 2003-10-16
Pages: 304
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Simulation Methods for ESD Protection Development looks at the integration of new techniques into a comprehensive development flow, which is now available due advances made in the field during the recent years. These findings allow for an early, stable ESD concept at a very early stage of the technology development, which is essential now development cycles have been reduced. The book also offers ways of increasing the optimization and control of the technology concerning performance, thus making the process more cost effective and increasingly efficient. This title provides a guide through the latest research and technology presenting the ESD protection development methodology. This is based on a combination of process, device and circuit stimulation, and addresses the optimization of the industry critical issue, reduced development cycles.Written to address the needs of the ESD engineer, this text is required reading by all industry practitioners and researchers and students within this field. The FIRST Extensive overview on the subject of ESD simulation Addresses the industry critical issue of reduced development cycles, and provides solutions Presents the latest research in the field with high practical relevance and its results

Electrostatic Discharge Protection And Latch Up Design And Methodologies For ASIC Development
Author: Steven H. Voldman
Publisher:
Release Date: 2018
Pages:
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Electrostatic discharge (ESD) has been an issue in devices, circuits, and systems for electronics for many decades, as early as the 1970s, and continued to be an issue until today. In this chapter, the issue of ESD protection design and methods for Application-Specific Integrated Circuits (ASICs) will be discussed. The chapter will discuss ESD design in an ASIC environment. The discussion will address ESD design layout, design rules and practices, and the method of integration of ESD protection into the ASIC design practice. Part of the methodology is the floor planning of an ASIC design, I/O library, integration of ESD into I/O cells, power distribution, and placement of power pads, in both array and peripheral design methodologies. As part of the ASIC I/O design, guard rings and latch-up interactions will be highlighted.

System Level ESD Protection
Author: Vladislav Vashchenko
Publisher: Springer Science & Business Media
Release Date: 2014-03-21
Pages: 320
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations.

ESD Protection Device And Circuit Design For Advanced CMOS Technologies
Author: Oleg Semenov
Publisher: Springer Science & Business Media
Release Date: 2008-04-26
Pages: 228
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

ESD Protection Device and Circuit Design for Advanced CMOS Technologies is intended for practicing engineers working in the areas of circuit design, VLSI reliability and testing domains. As the problems associated with ESD failures and yield losses become significant in the modern semiconductor industry, the demand for graduates with a basic knowledge of ESD is also increasing. Today, there is a significant demand to educate the circuits design and reliability teams on ESD issues. This book makes an attempt to address the ESD design and implementation in a systematic manner. A design procedure involving device simulators as well as circuit simulator is employed to optimize device and circuit parameters for optimal ESD as well as circuit performance. This methodology, described in ESD Protection Device and Circuit Design for Advanced CMOS Technologies has resulted in several successful ESD circuit design with excellent silicon results and demonstrates its strengths.

On Chip ESD Protection For Integrated Circuits
Author: Albert Z.H. Wang
Publisher: Springer Science & Business Media
Release Date: 2006-04-18
Pages: 303
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This comprehensive and insightful book discusses ESD protection circuit design problems from an IC designer's perspective. On-Chip ESD Protection for Integrated Circuits: An IC Design Perspective provides both fundamental and advanced materials needed by a circuit designer for designing ESD protection circuits, including: Testing models and standards adopted by U.S. Department of Defense, EIA/JEDEC, ESD Association, Automotive Electronics Council, International Electrotechnical Commission, etc. ESD failure analysis, protection devices, and protection of sub-circuits Whole-chip ESD protection and ESD-to-circuit interactions Advanced low-parasitic compact ESD protection structures for RF and mixed-signal IC's Mixed-mode ESD simulation-design methodologies for design prediction ESD-to-circuit interactions, and more! Many real world ESD protection circuit design examples are provided. The book can be used as a reference book for working IC designers and as a textbook for students in the IC design field.

ESD Design And Analysis Handbook
Author: James E. Vinson
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
Pages: 207
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Electrostatic Discharge is a pervasive issue in the semiconductor industry affecting both manufacturers and users of semiconductors. This easy-to-read, practical handbook presents an overview of ESD as it effects electronic circuits and provides a concise introduction for students, engineers, circuit designers and failure analysts.

ESD Design Challenges And Strategies In Deeply Scaled Integrated Circuits
Author:
Publisher: Stanford University
Release Date: 2010
Pages:
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

It is the main objective of this work to address the scaling and design challenges of ESD protection in deeply scaled technologies. First, the thesis introduces the on-chip ESD events, the scaling and design challenges, and the nomenclatures necessary for later chapters. The ESD design window and the I/O schematics for both rail clamping and local clamping ESD schemes are illustrated. Then, the thesis delves into the investigation of the input and output driver devices and examines their robustness under ESD. The input driver's oxide breakdown levels are evaluated in deeply scaled technologies. The output driver's trigger and breakdown voltages are improved appreciably by applying circuit and device design techniques. The ESD device sections first discuss rail-based clamping, a widely used protection scheme. Two diode-based devices, namely the gated diode and substrate diode, are investigated in detail with SOI test structures. Characterization is based on DC current-voltage (I-V), Very Fast Transmission Line Pulse (VF-TLP), capacitance, and leakage measurements. Improvements in performance are realized. Technology computer aided design (TCAD) simulations help understand the physical effects and design tradeoffs. Then, the following section focuses on the local clamping scheme. Two devices, the field-effect diode (FED) and the double-well FED (DWFED), are developed and optimized in an SOI technology. Trigger circuits are designed to improve the turn-on speed. The advantages of local clamping is highlighted and compared with the rail-based clamping. The results show that the FED is a suitable option for power clamping applications and the DWFED is most suitable for pad-based local clamping. The thesis presents an ESD protection design methodology, which takes advantage of the results and techniques from pervious chapters and put each element into a useful format. Based on the correlation of package level and in-lab test results, a design process based on CDM target definition and device optimization, discharge path analysis, parasitic minimization, I/O data rate estimation and finally ESD and performance characterization is used sequentially to systematically realize the overall design goals.

On Chip Electro Static Discharge  ESD  Protection For Radio Frequency Integrated Circuits
Author: Qiang Cui
Publisher: Springer
Release Date: 2015-03-10
Pages: 86
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This book enables readers to design effective ESD protection solutions for all mainstream RF fabrication processes (GaAs pHEMT, SiGe HBT, CMOS). The new techniques introduced by the authors have much higher protection levels and much lower parasitic effects than those of existing ESD protection devices. The authors describe in detail the ESD phenomenon, as well as ESD protection fundamentals, standards, test equipment, and basic design strategies. Readers will benefit from realistic case studies of ESD protection for RFICs and will learn to increase significantly modern RFICs’ ESD safety level, while maximizing RF performance.

System Level ESD Co Design
Author: Charvaka Duvvury
Publisher: John Wiley & Sons
Release Date: 2015-08-04
Pages: 424
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

An effective and cost efficient protection of electronic system against ESD stress pulses specified by IEC 61000-4-2 is paramount for any system design. This pioneering book presents the collective knowledge of system designers and system testing experts and state-of-the-art techniques for achieving efficient system-level ESD protection, with minimum impact on the system performance. All categories of system failures ranging from 'hard' to 'soft' types are considered to review simulation and tool applications that can be used. The principal focus of System Level ESD Co-Design is defining and establishing the importance of co-design efforts from both IC supplier and system builder perspectives. ESD designers often face challenges in meeting customers' system-level ESD requirements and, therefore, a clear understanding of the techniques presented here will facilitate effective simulation approaches leading to better solutions without compromising system performance. With contributions from Robert Ashton, Jeffrey Dunnihoo, Micheal Hopkins, Pratik Maheshwari, David Pomerenke, Wolfgang Reinprecht, and Matti Usumaki, readers benefit from hands-on experience and in-depth knowledge in topics ranging from ESD design and the physics of system ESD phenomena to tools and techniques to address soft failures and strategies to design ESD-robust systems that include mobile and automotive applications. The first dedicated resource to system-level ESD co-design, this is an essential reference for industry ESD designers, system builders, IC suppliers and customers and also Original Equipment Manufacturers (OEMs). Key features: Clarifies the concept of system level ESD protection. Introduces a co-design approach for ESD robust systems. Details soft and hard ESD fail mechanisms. Detailed protection strategies for both mobile and automotive applications. Explains simulation tools and methodology for system level ESD co-design and overviews available test methods and standards. Highlights economic benefits of system ESD co-design.

ESD
Author: Steven H. Voldman
Publisher: John Wiley & Sons
Release Date: 2011-04-04
Pages: 290
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Electrostatic discharge (ESD) continues to impact semiconductor components and systems as technologies scale from micro- to nano-electronics. This book studies electrical overstress, ESD, and latchup from a whole-chip ESD design synthesis approach. It provides a clear insight into the integration of ESD protection networks from a generalist perspective, followed by examples in specific technologies, circuits, and chips. Uniquely both the semiconductor chip integration issues and floorplanning of ESD networks are covered from a ‘top-down' design approach. Look inside for extensive coverage on: integration of cores, power bussing, and signal pins in DRAM, SRAM, CMOS image processing chips, microprocessors, analog products, RF components and how the integration influences ESD design and integration architecturing of mixed voltage, mixed signal, to RF design for ESD analysis floorplanning for peripheral and core I/O designs, and the implications on ESD and latchup guard ring integration for both a ‘bottom-up' and ‘top-down' methodology addressing I/O guard rings, ESD guard rings, I/O to I/O, and I/O to core classification of ESD power clamps and ESD signal pin circuitry, and how to make the correct choice for a given semiconductor chip examples of ESD design for the state-of-the-art technologies discussed, including CMOS, BiCMOS, silicon on insulator (SOI), bipolar technology, high voltage CMOS (HVCMOS), RF CMOS, and smart power practical methods for the understanding of ESD circuit power distribution, ground rule development, internal bus distribution, current path analysis, quality metrics ESD: Design and Synthesis is a continuation of the author's series of books on ESD protection. It is an essential reference for: ESD, circuit, and semiconductor engineers; design synthesis team leaders; layout design, characterisation, floorplanning, test and reliability engineers; technicians; and groundrule and test site developers in the manufacturing and design of semiconductor chips. It is also useful for graduate and undergraduate students in electrical engineering, semiconductor sciences, and manufacturing sciences, and on courses involving the design of ESD devices, chips and systems. This book offers a useful insight into the issues that confront modern technology as we enter the nano-electronic era.

ESD In Silicon Integrated Circuits
Author: E. Ajith Amerasekera
Publisher: Wiley-Blackwell
Release Date: 2002-05-22
Pages: 412
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

* Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits. * Provides guidance on the implementation of circuit protection measures. * Includes new sections on ESD design rules, layout approaches, package effects, and circuit concepts. * Reviews the new Charged Device Model (CDM) test method and evaluates design requirements necessary for circuit protection.

Basic ESD And I O Design
Author: Sanjay Dabral
Publisher: Wiley-Interscience
Release Date: 1998
Pages: 305
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This volume presents an integrated treatment of ESD, I/O, and process parameter interactions that both I/O designers and process designers can use. It examines key factors in I/O and ESD design and testing, and helps the reader consider ESD and reliability issues up front when making I/O choices. Emphasizing clarity and simplicity, this book focuses on design principles that can be applied widely as this dynamic field continues to evolve.

LNA ESD Co Design For Fully Integrated CMOS Wireless Receivers
Author: Paul Leroux
Publisher: Springer Science & Business Media
Release Date: 2005-11-07
Pages: 187
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers. The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA’s behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.

TVS Transient Behavior Modeling Method  And System Level Effective ESD Design For USB3 X Interface
Author: Pengyu Wei
Publisher:
Release Date: 2018
Pages: 75
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

"This research proposal presents a methodology whereby a protection device can be modeled in SPICE compatible platforms with respect to the transient behaviors during Electrostatic Discharge (ESD) events. This methodology uses an exclusively "black-box" approach to characterize the parameters of the protection device, thereby allowing it to be implemented without intimate knowledge of the DUT. Results of this methodology can be used to predict the transient response (conductivity modulation and snapback delay) of the ESD protection devices, and thereby predicts how much current could flow into the device (typically a digital IO pin) under protection. The transient behavior modeling methodology for the ESD protection device is developed for the purpose of system level ESD design, and it is part of the study of System-level Effective ESD Design (SEED) methodology. During the work, the transient behavior modeling method and the SEED methodology have been applied to a high-speed USB3.x repeater IC circuit design. This article introduces a PCB test board working as USB3.x repeater, which allows to place various on-board protection devices and to measure the residual voltage and current at the IO pin accurately. In Section 2, the transient behavior modeling framework and the characterization method will be introduced. The validation results of three different types of protection devices are shown in the end of the section. In Section 3, the implementation of SEED methodology to a USB3.x system design will be introduced. The measurement setup is described in detail. Finally, the validation results for different scenarios will be shown"--Abstract, page iii.

ESD From A To Z
Author: John Kolyer
Publisher: Springer Science & Business Media
Release Date: 1990-08-02
Pages: 250
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This cost-effective approach to ESD-control situations provides a detailed and logical system that codifies control methods into specific model specifications that can be adapted to any program. By emphasizing the essentials of handling technique, it minimizes the need for expensive equipment beyond

Modeling Of Electrical Overstress In Integrated Circuits
Author: Carlos H. Diaz
Publisher: Springer Science & Business Media
Release Date: 1994-11-30
Pages: 148
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Electrical overstress (EOS) and Electrostatic discharge (ESD) pose one of the most dominant threats to integrated circuits (ICs). These reliability concerns are becoming more serious with the downward scaling of device feature sizes. Modeling of Electrical Overstress in Integrated Circuits presents a comprehensive analysis of EOS/ESD-related failures in I/O protection devices in integrated circuits. The design of I/O protection circuits has been done in a hit-or-miss way due to the lack of systematic analysis tools and concrete design guidelines. In general, the development of on-chip protection structures is a lengthy expensive iterative process that involves tester design, fabrication, testing and redesign. When the technology is changed, the same process has to be repeated almost entirely. This can be attributed to the lack of efficient CAD tools capable of simulating the device behavior up to the onset of failure which is a 3-D electrothermal problem. For these reasons, it is important to develop and use an adequate measure of the EOS robustness of integrated circuits in order to address the on-chip EOS protection issue. Fundamental understanding of the physical phenomena leading to device failures under ESD/EOS events is needed for the development of device models and CAD tools that can efficiently describe the device behavior up to the onset of thermal failure. Modeling of Electrical Overstress in Integrated Circuits is for VLSI designers and reliability engineers, particularly those who are working on the development of EOS/ESD analysis tools. CAD engineers working on development of circuit level and device level electrothermal simulators will also benefit from the material covered. This book will also be of interest to researchers and first and second year graduate students working in semiconductor devices and IC reliability fields.

ESD From A To Z
Author: John M. Kolyer
Publisher: Springer Science & Business Media
Release Date: 2012-12-06
Pages: 338
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

Existing sections in ESD Frim A to Z have been thoroughly revised and updated. New examples have been added to the troubleshooting chapter; and new versions of model specifications for ESD-safe handling and packaging can be found in the specifications chapter. The Appendix now includes ten recently published papers (making a total of 20) whose topics span the field of ESD control.

Semiconductor Laser Engineering  Reliability And Diagnostics
Author: Peter W. Epperlein
Publisher: John Wiley & Sons
Release Date: 2013-01-25
Pages: 520
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This reference book provides a fully integrated novel approach to the development of high-power, single-transverse mode, edge-emitting diode lasers by addressing the complementary topics of device engineering, reliability engineering and device diagnostics in the same book, and thus closes the gap in the current book literature. Diode laser fundamentals are discussed, followed by an elaborate discussion of problem-oriented design guidelines and techniques, and by a systematic treatment of the origins of laser degradation and a thorough exploration of the engineering means to enhance the optical strength of the laser. Stability criteria of critical laser characteristics and key laser robustness factors are discussed along with clear design considerations in the context of reliability engineering approaches and models, and typical programs for reliability tests and laser product qualifications. Novel, advanced diagnostic methods are reviewed to discuss, for the first time in detail in book literature, performance- and reliability-impacting factors such as temperature, stress and material instabilities. Further key features include: practical design guidelines that consider also reliability related effects, key laser robustness factors, basic laser fabrication and packaging issues; detailed discussion of diagnostic investigations of diode lasers, the fundamentals of the applied approaches and techniques, many of them pioneered by the author to be fit-for-purpose and novel in the application; systematic insight into laser degradation modes such as catastrophic optical damage, and a wide range of technologies to increase the optical strength of diode lasers; coverage of basic concepts and techniques of laser reliability engineering with details on a standard commercial high power laser reliability test program. Semiconductor Laser Engineering, Reliability and Diagnostics reflects the extensive expertise of the author in the diode laser field both as a top scientific researcher as well as a key developer of high-power highly reliable devices. With invaluable practical advice, this new reference book is suited to practising researchers in diode laser technologies, and to postgraduate engineering students. Dr. Peter W. Epperlein is Technology Consultant with his own semiconductor technology consulting business Pwe-PhotonicsElectronics-IssueResolution in the UK. He looks back at a thirty years career in cutting edge photonics and electronics industries with focus on emerging technologies, both in global and start-up companies, including IBM, Hewlett-Packard, Agilent Technologies, Philips/NXP, Essient Photonics and IBM/JDSU Laser Enterprise. He holds Pre-Dipl. (B.Sc.), Dipl. Phys. (M.Sc.) and Dr. rer. nat. (Ph.D.) degrees in physics, magna cum laude, from the University of Stuttgart, Germany. Dr. Epperlein is an internationally recognized expert in compound semiconductor and diode laser technologies. He has accomplished R&D in many device areas such as semiconductor lasers, LEDs, optical modulators, quantum well devices, resonant tunneling devices, FETs, and superconducting tunnel junctions and integrated circuits. His pioneering work on sophisticated diagnostic research has led to many world’s first reports and has been adopted by other researchers in academia and industry. He authored more than seventy peer-reviewed journal papers, published more than ten invention disclosures in the IBM Technical Disclosure Bulletin, has served as reviewer of numerous proposals for publication in technical journals, and has won five IBM Research Division Awards. His key achievements include the design and fabrication of high-power, highly reliable, single mode diode lasers. Book Reviews “Semiconductor L

ESD Program Management
Author: G. Theodore Dangelmayer
Publisher: Springer Science & Business Media
Release Date: 1999-01-31
Pages: 471
ISBN:
Available Language: English, Spanish, And French
EBOOK SYNOPSIS:

This is a revision of the highly successful electronic manufacturing guide, ESD Program Management: A Realistic Approach to Continuous Measurable Improvement in Static Control. This revision is comprehensive and explains how to develop, implement and manage an ESD control program, and includes up-to-date data, many new chapters, new case studies, and much more. New to this edition: Extensive changes and additions to auditing techniques, cost benefits data, and materials evaluation. Six new chapters on common myths, issues related to smaller companies, process controls, ISO 9000, material characterization, and training. New case studies on field-induced failures in the factory, long-distance central office system upsets, and automation-caused failures. Expanded coverage of the needs of smaller companies including discussion of common problems and cost-effective solutions. A training breakthrough is presented. Previously invisible ESD events can now be easily displayed for students at all levels - `Seeing is believing!' Inclusion of new testing instruments such as the event detector and resistance probe. The 12 critical factors in an ESD program have been updated to reflect changes and refinements in program management. The author has also included the latest information on handling procedures and requirements from the Lucent ESD Control Handbook. ESD Program Management: A Realistic Approach to Continuous Measurable Improvement in Static Control, Second Edition, is a refreshingly unbiased guide for electronic manufacturing and quality control professionals.